Sensor retínico espacio variante basado en tecnología CMOS

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The utilization of images as the input for a processing system is a research field that has demonstrated its benefits in many applications ranging from control and monitoring to robot vision systems. In most cases, a classical video camera has been employed to solve many different image processing tasks. With the increasing market of the image processing, and with the cost reduction of different technologies than the CCD, came a change in the technology employed for sensor fabrication. This change in orientation to the sensor itself and the way images are captured, has led to the introduction of new pixel topologies for image cameras. The cartesian grid distribution is interesting for most application, but some other topology, as in the human eye where resolution is higher in the middle for example, can be interesting for some specific applications. The mathematical properties of the log-polar mapping (that is a particular case of a space-variant topology, like in the eye), and its properties of selective data reduction, make this special mapping the most suitable to implement foveated vision cameras (more resolution in the image center than in the periphery). The CMOS technology has become very popular during the last years due to its low cost and easy design. The application arena of this technology is the digital circuit design, but since its cost is reduced, it has become interesting the application in analog systems and the implementation of vision sensors. CMOS image quality is not as good as the CCD, but for an automatic vision system, the concept of good quality depends on the task to be performed, and nowadays, most image processing problems can be solved with less image quality than the offered by CCD cameras. Yet, the CMOS technology offers many advantages for the implementation of image processing systems, as the easy connection logic and simple interface, control circuitry reduction, true random access, etc. Both ideas are put together in this thesis. In the one hand, the implementation of a space-variant sensor for image processing or just acquisition, and in the other hand, the employment of the CMOS technology for the image sensor design and fabrication. Several reasons justify the election of the CMOS process to fabricate the sensor. First, it has been demonstrated that the CDD technology is not good to solve the design and scaling problem coming from the presence of different size pixels and their polar distribution. Second, the retinal sensor can play a good role in embedded vision systems; therefore, it is interesting to have a simple interface to a microprocessor system, a bus, etc. Also, it is interesting the cost reduction coming from the use of these sensors together with the indirect cost lowering coming from the system size reduction and the simple control logic. There are several possibilities to capture light using the CMOS technology. Those sensors which cells are based on light integration during a time interval form a first sensor group. This method, although it offers good image quality, is not the most adequate for the space-variant sensing since it is very difficult to solve the scaling problem among different size pixels. Yet, the control logic is critical and there is no true random access. In the other group, sensors transform light in an electrical magnitude measurable in a continuous way; image quality is not so good since they are more sensible to noise, but their driving logic is simpler and they can truly be accessed pixel by pixel in a continuous way. The elected cell for the sensor implementation is found in this second group, presenting a logarithmic relation between incident light and output signal. The logarithmic response solves the scaling problem among cells since it transforms the scaling differences in additive terms that can be easily subtracted outside the chip by a circuit that is also described. In the other hand, the transistor scaling among circumferences allows a test bench to prove and measure the small geometry effects of MOS transistors. In this way, some studies have been carried out on the narrow channel effects in the sensor that are interesting since there are few systems where the width scaling can be tested. The sensor has been designed and fabricated using the Mietec 0.7um CMOS technology. Current design tools are not prepared to handle designs with curves, polar disposition of elements, etc. This problem has been solved using a full custom design approach based on a language to describe every element of the sensor. Every polygon and vertex is described using this language from the mathematical sensor description. The resulting description generates, almost automatically, the sensor focal plane of any retinal structure just giving the basic sensor parameters (pixel number, circumferences, pixel pitch, etc.). The fabricated sensor works correctly. A camera and frame grabber have been implemented to make some experiments and measures. The sensor can work up to 200 images per second. The resolution is 128x56 in the retina and 20 more rings in the fovea with decreasing number of pixels per ring. The image quality is about 7 bits (128 grey levels). The logarithmic response allows up to 4 decades of illumination levels. The main disadvantage is the high fixed pattern of noise (FPN) that can be easily solved by external circuitry. Another problem is the difference in the gain between inner and outer cells due to the leakage current in small cells, but this difference is small and can be minimized outside the sensor. This new sensor opens a wide field of applications ranging from the real time image communication through low bandwidth lines, to the high-speed movement analysis for robotic navigation. First application has been already implemented using the retinal sensor for a deaf-mute communication system. Second application is still under study and development by some research institutes.
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